Interleaving based variable ordering methods for ordered binary decision diagrams

Abstract

Ordered binary decision diagrams (OBDDs) are efficient representations of Boolean functions and have been widely used in various computer-aided design tools. Since the size of an OBDD depends on variable ordering, it is important to find a good variable order for the efficient manipulation of OBDDs. In particular, it is important to find the same good variable order for multiple functions, since multiple functions are handled at the same time in most computer-aided design tools. The paper describes new variable ordering algorithms for multiple output circuits. The new algorithms use variable interleaving, while conventional algorithms use variable appending. For some benchmark circuits, OBDDs have been successfully generated by using the new algorithms, while they have not been generated by using conventional algorithms. Consequently, the new variable ordering algorithms are effective and allow us to apply OBDD-based CAD tools to wider classes of circuits.