A 250-Mb/s 32*32 CMOS crosspoint LSI for ATM switching systems

M. Akata, S. Karube, Toshitsugu Sakamoto, T. Saito, Shinji Yoshida, Tetsuhiko Maeda

IEEE Journal of Solid-State Circuits · 1990 · 12 citations · 2 references

Concepts

Abstract

A 32*32 crosspoint LSI and a time-slot controlled asynchronous-transfer-mode (ATM) switch architecture utilizing the LSI are presented. The ATM switch, which is classified as an input-buffer-type ATM switch, enables 99% throughput and broadcasting capability. The crosspoint LSI is characterized by the bit-map oriented and pipelined connection control method which can switch and broadcast 160-Mb/s ATM cells, 32*32 switch cells which have less parasitic capacitance, and emitter-coupled-logic (ECL) compatible interfaces which are compatible with a 160-MHz broadband ISDN data rate. The LSI has been fabricated by a 1- mu m CMOS process. The chip size is 7.4 mm*7.4 mm. According to the evaluation, operation at 250 Mb/s is confirmed. 1.2-W power consumption is observed at 160-Mb/s operating condition.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

References

2