Processor with 4.9-μs break-even time in power gating using crystalline In-Ga-Zn-oxide transistor

Abstract

A processor having a power management unit (PMU) and an 8-bit CPU including flip-flops with shadow memories is fabricated by 0.5-μm Si and 0.8-μm c-axis-aligned crystalline In-Ga-Zn-oxide (CAAC-IGZO) technology. The shadow memories hold data without power supply utilizing low off-state current of CAAC-IGZO FETs. A break-even time (BET) of 4.9μs has been obtained. Good scalability of the processor in writing data to shadow memories and in area (5.7% overhead or less) is also confirmed through simulation and layout, based on flip-flops using 30-nm Si FETs combined with 0.3-μm CAAC-IGZO FETs which show good electronic characteristics and no overhead in area.