Publication | Closed Access
Towards efficient multi-level threading of H.264 encoder on intel hyper-threading architectures
63
Citations
14
References
2004
Year
Unknown Venue
EngineeringVideo Coding FormatMultimedia ProcessorComputer ArchitectureMultithreading (Computer Architecture)Intel Hyper-threading ArchitecturesHigh-performance ArchitectureCompilersParallel ComputingH.264 EncoderMultilevel Data PartitioningMultimedia Signal ProcessingComputer EngineeringThread-level ParallelismComputer ScienceParallel Performance EvaluationMany-core ArchitectureParallel ProgrammingData-level Parallelism
Summary form only given. Exploiting thread-level parallelism is a promising way to improve the performance of multimedia applications that are running on multithreading general-purpose processors. We describe the work in developing our threaded H.264 encoder. We parallelize the H.264 encoder using the OpenMP programming model, which allows us to leverage the advanced compiler technologies in the Intel/spl reg/ C++ compiler for Intel hyper-threading architectures. After we present our design considerations in the parallelization process, we describe two efficient methods for multilevel data partitioning, which can improve the performance of our multithreaded H.264 encoder. Furthermore, we exploit different options in the OpenMP programming. While one implementation that uses the task queuing model is slightly slower than the other implementation, it is easier to be read than the other one. The results have shown good speedups ranging from 3.74x to 4.53x over the well-optimized sequential code performance on a system of 4 Intel Xeon/spl trade/processors with hyper-threading technology.
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