2007 · 17 citations · 8 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsCmos Circuit DesignDigital Integrated Circuit DesignDigital Integrated CircuitsDigital Signal ProcessingIntegrated Circuit DesignMixed-signal Integrated Circuit DesignCmos Analog Circuit DesignCmos Analog Integrated CircuitsComplementary Metal-oxide-semiconductor DevicesDecimation ArchitecturesEnergy-efficient Digital CircuitsLow-power Cmos DesignMobile Communication TechnologiesSilicon
This work proposes low power non-recursive decimation filters in a GSM (global system for mobile communication) and UMTS (universal mobile telecommunications system) dual mode sigma delta ADC. The proposed technique is an alternative to the standard CIC (Cascaded Integrator-Comb) approach with a decimation factor of m-th power of two and m-th power of three. 70% to 80% power consumption can be saved by the non-recursive structure compared to the Hogenauer CIC architecture. More research is done to find the break-even point of silicon area for non-recursive and recursive architectures. A low power decimation filter chip for a UMTS and GSM dual mode sigma delta A/D converter is fabricated in 0.35◻m CMOS (complementary metal-oxide- semiconductor) and consumes 4.72 mW in GSM and 5.54 mW in UMTS mode, both at Vdd=2.5V.
8
Efficient polyphase decomposition of comb decimation filters in Σ△ analog-to-digital converters
Hassan Aboushady, Y. Dumonteix, Marie‐Minerve Louërat et al. · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2001 · 145 citations
Engineering, Computer Engineering, Electrical Engineering +17