Publication | Closed Access
A programmable VLSI architecture for computing multiplication and polynomial evaluation modulo a positive integer
17
Citations
10
References
1988
Year
Programmable Vlsi ArchitectureCryptographic PrimitiveEngineeringHardware AlgorithmComputer ArchitectureBlock CipherFormal VerificationHardware SecurityParallel ComputingPositive IntegerAb Mod NComputer EngineeringPolynomial EvaluationCryptosystemComputer ScienceFpga DesignCryptographyLogic SynthesisVlsi ArchitectureFormal MethodsComputer AlgebraExpansible FeaturesHomomorphic Encryption
A programmable VLSI architecture with regular, modular, expansible features is designed for computing AB mod N, AB+C mode N, and polynomial evaluation modulo N. The size of the resultant circuit can be easily expanded to improve the security of cryptosystems without making any change to its control circuit. The computing procedures for all N throughout the range of 0<N<2/sup n-1/ are identical. Therefore, the circuit is well-suited for those systems in which the value of N is alternated frequently.<<ETX>>
| Year | Citations | |
|---|---|---|
Page 1
Page 1