Optimization of on-State and Switching Performances for 15–20-kV 4H-SiC IGBTs

Abstract

The 4H-SiC p-channel IGBTs designed to block 15 and 20 kV are optimized for minimum loss (on-state plus switching power) by adjusting the parameters of the JFET region, drift layer, and buffer layer, using 2-D MEDICI simulations. Switching loss exhibits a strong dependence on buffer layer thickness, doping, and lifetime due to their influence on the current tail. In contrast, drift layer lifetime has little effect on the crossover frequency at which the MOSFET and IGBT have equal loss.