Publication | Closed Access
Statistical timing analysis based on a timing yield model
55
Citations
20
References
2004
Year
Unknown Venue
EngineeringVlsi DesignComputer ArchitectureStatistical Timing AnalysisPhysical Design (Electronics)Reliability EngineeringTiming AnalysisSystems EngineeringModeling And SimulationTimed SystemElectrical EngineeringHardware ReliabilityComputer EngineeringTiming YieldMicroelectronicsSignal ProcessingWithin-die Systematic VariationsCircuit DesignProcess ControlSystem Performance AnalysisParametric Yield
Starting from a model of the within-die systematic variations using principal components analysis, a model is proposed for estimation of the parametric yield, and is then applied to estimation of the timing yield. Key features of these models are that they are easy to compute, they include a powerful model of within-die correlation, and they are "full-chip" models in the sense that they can be applied with ease to circuits with millions of components. As such, these models provide a way to do statistical timing analysis without the need for detailed statistical analysis of every path in the design.
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