2002 IEEE Nuclear Science Symposium Conference Record · 2003 · 80 citations · 1 references
EngineeringComputer EngineeringNuclear MedicineAnalog ElectronicsField-programmable Gate ArraysRadiation DetectionClock ManagementDigital Signal ProcessingGamma-ray DetectionGamma-ray DetectorsPositron Emission TomographyRadiation Imaging DetectorsAnalog Circuit DesignClock Network ArchitectureClocking ArchitectureCmos Analog Circuit DesignEvent ProcessingGamma-ray ImagingPet Detector TechnologyTiming Architecture
The basic principle involved in a Positron Emission Tomography (PET) medical imaging scanner is the annihilation of a positron-electron pair within a body that produces a pair of gamma-ray photons. An FPGA is used to process gamma-ray event inputs from a PET detector. An analog circuit compares the incoming gamma-ray event pulse to a threshold and produces a trigger pulse when above the threshold. A digital TDC circuit, timed with a 192 MHz quadrature clock, resides inside the event processing FPGA and measures the arrival time of this pulse. The TDC circuit does this by running a quadrature counter that is latched synchronously by a trigger pulse edge detection circuit, also running in quadrature. Meta-stability is limited to one quarter clock cycle of the trigger pulse edge circuit. The TDC circuit has a requirement to measure the arrival time with a spread based on repeated conversions of /spl plusmn/2 LSB of the 192 MHz quadrature clock (1.302 nS), a standard deviation based on repeated conversions of less than 1/2 LSB, and a differential non-linearity of less than /spl plusmn/1/2 LSB.
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