Physical design of a fourth-generation POWER GHz microprocessor

C.J. Anderson, John G. Petrovick, J. Keaty, J. Warnock, Gerhard Nussbaum, J.M. Tendier, C. Carter, S. Chu, J. Clabes, J. DiLullo,

2002 · 117 citations · 0 references

Concepts

Abstract

The fourth-generation POWER processor chip contains 170M transistors and includes 2 microprocessor cores, shared L2, directory for an off-chip L3, and all logic needed to interconnect multiple chips to form an SMP. It is implemented in a 0.18 /spl mu/m SOI technology, with 7 layers of Cu interconnect, and functions in systems at 1.1 GHz, and dissipates 115 W at 1.5 V.