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Physical design of a fourth-generation POWER GHz microprocessor
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2002
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EngineeringVlsi DesignRadio FrequencyOff-chip L3Physical DesignComputer ArchitecturePower ElectronicsProcessor ArchitectureElectromagnetic CompatibilityComputational ElectromagneticsParallel ComputingManycore ProcessorElectrical EngineeringHigh-frequency DeviceXeon PhiAntennaComputer EngineeringMultiple ChipsMicroelectronicsMicrowave EngineeringSystem On ChipVlsiTechnologyMicroprocessor Cores
The fourth-generation POWER processor chip contains 170M transistors and includes 2 microprocessor cores, shared L2, directory for an off-chip L3, and all logic needed to interconnect multiple chips to form an SMP. It is implemented in a 0.18 /spl mu/m SOI technology, with 7 layers of Cu interconnect, and functions in systems at 1.1 GHz, and dissipates 115 W at 1.5 V.