2007 · 22 citations · 21 references
EngineeringComputer EngineeringComputer ScienceDesign OptimizationLow-power DesignSchedulingEnergy-efficient Embedded SystemsPerformance OptimizationPower ManagementPower OptimizationPower-aware DesignTask SchedulingEnergy ConsumptionEnergy OptimizationMixed-integer Linear ProgrammingMixed-integer ProgrammingPerformance ConstraintsPipeline SchedulingSimulated AnnealingThroughput Constraints
The present paper focuses on applications that are periodic and have both latency and throughput constraints. For these applications, pipeline scheduling is effective for reducing energy consumption. Thus, the present paper proposes a pipelined task scheduling method for minimizing the energy consumption of GALS MP-SoC under latency and throughput constraints. First, we model target GALS MP-SoC architecture and application tasks. We then show that the energy optimization problem under this model belongs to the class of mixed-integer linear programming. Next, we propose a new scheduling method based on simulated annealing for the purpose of solving this problem quickly. Finally, experimental results demonstrate that the proposed method achieves a significant energy reduction on a real application under a practical architecture
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Anantha P. Chandrakasan, R.W. Brodersen · 2015 · 2.2K citations
Engineering, Computer Engineering, Electrical Engineering +17
A dynamic voltage scaled microprocessor system
Tom Burd, Trevor Pering, A. Stratakos et al. · IEEE Journal of Solid-State Circuits · 2000 · 911 citations