Publication | Closed Access
A low power consumption 10-bit rail-to-rail SAR ADC using a C-2C capacitor array
31
Citations
7
References
2008
Year
Unknown Venue
Sar AdcData ConverterMixed-signal Integrated CircuitAnalog DesignDigital Circuit DesignDigital-to-analog ConverterC-2c Capacitor ArrayMedical InstrumentationAnalog-to-digital Converter
A 10-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for biomedical applications is presented. The proposed SAR ADC achieves rail-to-rail input range and low power consumption. A Digital-to-Analog Converter (DAC) using C-2C capacitor array and dynamic comparator is used for low power consumption. It is realized in 0.18 mum standard CMOS technology. This ADC has signal to noise and distortion ratios (SNDR) of 53.8dB for 1.5 V supply voltage. It consumes 13.4 muW at sampling rates of 137 kS/s.
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