Subthreshold drain leakage currents in MOS field-effect transistors

Abstract

There are two contributions to the drain-source leakage current in MOS field-effect transistors for gate voltages below the extrapolated threshold voltage (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">tx</inf> ) : 1) reverse-bias drain junction leakage current, and 2) a surface channel current that flows when the surface is weakly inverted. Nearly six orders of magnitude of drain-source current from the background limit imposed by the drain junction leakage to the lower limits of detection of most curve tracers (0.05 µA) are controlled by gate-source voltages below the extrapolated threshold voltage. It is shown that this current flows only for gate voltages above the intrinsic voltage V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">i</inf> , the gate voltage at which the silicon surface becomes intrinsic. For gate voltages between V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">i</inf> and V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">tx</inf> the surface is weakly inverted with the resulting channel conductivity being responsible for the drain-source current "tails" observed for gate voltages below V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">tx</inf> . The importance of the intrinsic voltage in designing low-leakage CMOS and standard PMOS circuitry is discussed.