IEEE Journal of Solid-State Circuits · 1989 · 39 citations · 5 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsAnalog Integrated CircuitsAnalog IntegrationCmos Circuit DesignDigital Integrated CircuitsMixed-signal Integrated Circuit DesignMixed-signal IntegrationAnalog-to-digital ConvertersCmos Analog Circuit DesignCmos Analog Integrated CircuitsDigital-to-analog ConvertersGlitch Power ReductionLinearityPower ConsumptionSource Matching
A 6-b weighted-current-sink video digital-to-analog converter (DAC) with 10-90% rise/fall time of 4 ns, integrated with a double-metal 3- mu m CMOS technology, is described. Current-source matching, glitch reduction, and differential switch driving aspects are considered. A circuit solution and a nonconventional layout technique yield a high conversion rate with a standard CMOS technology. Experimental results show that a conversion rate of 100 MHz is achievable. The power consumption is 150 mW and the active chip area is 0.5*1.0 mm/sup 2/. The differential of 0.1 LSB demonstrates that 8 b of accuracy can be achieved. The integral linearity is 0.5 LSB.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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An 80-MHz 8-bit CMOS D/A converter
T. Miki, Yohei Nakamura, M. Nakaya et al. · IEEE Journal of Solid-State Circuits · 1986 · 240 citations
A high-performance CMOS 70-MHz palette/DAC
L. Letham, B.K. Ahuja, K.N. Quader et al. · IEEE Journal of Solid-State Circuits · 1987 · 19 citations