Low-distance path-based multicast routing algorithm for network-on-chips

TLDR

The study proposes a low‑distance path‑based multicast routing algorithm for network‑on‑chip and multiprocessor systems‑on‑chip architectures. The algorithm operates on a mesh topology, employing network partitioning, optimized destination ordering, an odd–even turn model adaptive routing, and congestion‑aware path selection to avoid highly congested areas. Experiments demonstrate that the algorithm achieves lower average delays, reduced average and peak power consumption, and a hardware overhead below 8 % compared to prior path‑based multicast schemes.

Abstract

In this study, a low-distance path-based multicast routing algorithm for network-on-chips (NoCs) and multiprocessor systems-on-chip is proposed. The algorithm, which is based on the mesh topology, makes use of network partitioning, optimised destination ordering and the odd–even turn model adaptive routing technique for both the multicast and unicast messages. Additionally, the algorithm invokes non-congested paths in routing the messages to prevent creating highly congested areas. This is achieved by considering the congestion condition of the input ports. The efficiency of the proposed multicast routing algorithm is evaluated by comparing its performance with those of previously proposed algorithms under both multicast and mixed (mixture of unicast and multicast) traffic models. The results show that the proposed technique has lower average delays and lower average and peak power consumptions compared to those of the other path-based multicasting algorithm for different message injection rates. The technique has a hardware overhead of less than 8%.