Comparative study of fabricated junctionless and inversion-mode nanowire FETs

Abstract

For the higher degree of integration and better performance of a device, the feature size of conventional MOSFET is expected to go down under 20 nm within a few years and the nanowire FET (NWFET) is the most conspicuous candidate for the future device application. However, in the case of conventional inversion mode NWFETs (cINT), the formation of an abrupt junction for the source/drain (SD) is one of the technical obstacles. Recently, junctionless NWFETs (JNT) where the channel and SD region are doped with the same dopant type has been suggested. In this work, the n-type JNTs and cINT are fabricated with the gate length (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> ) of 20 ~ 250 nm and compared their electrical DC characteristics and low-frequency noise characteristics.