EXPLORER: a retargetable and visualization-based trace-driven simulator for superscalar processors

Abstract

The quantitative approach to computer architecture and processor design requires extensive experimentation to assess the potential performance benefits of individual techniques. Using trace-driven simulation (TDS) tools in conjunction with optimizing compilers, a designer can quickly characterize the dynamic behavior and the resultant performance of a candidate machine running a realistic benchmark. Most current TDS tools have two shortcomings, namely the lack of retargetability and the lack of visualization support. The authors present the development of a highly retargetable TDS tool suite, called EXPLORER, that incorporates powerful visualization and interactive capabilities. A prototype of EXPLORER has been implemented and examples of retargeting and visualization-based simulation of the RS/6000 and the MPC 601 have been performed to demonstrate its effectiveness. >