Publication | Open Access
Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack
104
Citations
28
References
2010
Year
Unknown Venue
X86 InstructionEngineeringAsf SupportComputer ArchitectureMemory Model (Programming)Processor ArchitectureMulti-channel Memory ArchitectureHardware SecurityHigh-performance ArchitectureParallel ComputingCompilersInstruction-level ParallelismConcurrent ProgrammingComputer EngineeringComputer ScienceMemory ArchitectureProgram AnalysisParallel ProgrammingConcurrent Data StructureAdvanced Synchronization FacilitySystem SoftwareTransactional Memory
AMD's Advanced Synchronization Facility (ASF) is an x86 instruction set extension proposal intended to simplify and speed up the synchronization of concurrent programs. In this paper, we report our experiences using ASF for implementing transactional memory. We have extended a C/C++ compiler to support language-level transactions and generate code that takes advantage of ASF. We use a software fallback mechanism for transactions that cannot be committed within ASF (e.g., because of hardware capacity limitations). Our evaluation uses a cycle-accurate x86 simulator that we have extended with ASF support. Building a complete ASF-based software stack allows us to evaluate the performance gains that a user-level program can obtain from ASF. Our measurements on a wide range of benchmarks indicate that the overheads traditionally associated with software transactional memories can be significantly reduced with the help of ASF.
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