Design and Fabrication of Asymmetric MOSFETs Using a Novel Self-Aligned Structure

Abstract

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> A novel asymmetric MOSFET with no lightly doped drain on the source side is simulated on bulk Si using a device simulator (SILVACO). To overcome the problems of the conventional asymmetric process, a novel asymmetric MOSFET using a mesa structure and a sidewall spacer gate is proposed, and it provides a self-alignment process, aggressive scaling, and better uniformity. First of all, we have compared the simulated characteristics of the asymmetric and symmetric MOSFETs. Basically, both asymmetric and symmetric MOSFETs have an n-type channel and the same physical parameters. Compared with the symmetric MOSFET, the asymmetric MOSFET shows better device performance. Moreover, we have successfully fabricated 50-nm asymmetric NMOSFETs based on simulation results and investigated its operation and characteristics. </para>