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Novel Enhanced-Planar IGBT Technology Rated up to 6.5kV for Lower Losses and Higher SOA Capability
69
Citations
6
References
2006
Year
Unknown Venue
EngineeringEnergy EfficiencyEnhanced-planar Igbt TechnologyPower Electronic SystemsIntegrated CircuitsPower ElectronicsInterconnect (Integrated Circuits)Semiconductor DeviceAdvanced Packaging (Semiconductors)Electronic EngineeringElectronic PackagingPower Electronic DevicesEp-igbt ChipHigher Soa CapabilityElectrical EngineeringPower Semiconductor DeviceComputer EngineeringIgbt Planar TechnologyLower LossesMicroelectronicsPower Device
In this paper, we introduce an IGBT planar technology, which sets a new performance benchmark in terms of losses and SOA capability. The improved trade-off relationship between on-state losses V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ce(sat) </sub> and turn-off losses E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> (i.e. technology curve) was solely realized by means of planar cell enhancement. Simultaneously, high levels of turn-off ruggedness (RBSOA) were obtained with the new cell design. The enhanced-planar IGBT technology is implemented on the soft-punch-through (SPT) buffer concept for ensuring controllable and soft switching behaviour. The paper covers design details of the enhanced-planar technology and a full set of results for the 6500V EP-IGBT chip
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