Tradeoff Between Mobility and Subthreshold Characteristics in Dual-Channel Heterostrucure n- and p-MOSFETs

Abstract

The mobility and subthreshold characteristics of TiN-gate, dual-channel heterostructure MOSFETs consisting of strained-Si-Si/sub 0.4/Ge/sub 0.6/ on relaxed Si/sub 0.7/Ge/sub 0.3/ are studied for strained-Si cap layer thicknesses ranging from 3 to 10 nm. The thinnest Si cap sample (3 nm) yields the lowest subthreshold swing (80 mV/dec) and the highest hole mobility enhancement (2.3X at a vertical effective field of 1 MV/cm). N-MOSFETs show the expected electron mobility enhancement (1.8X) for 10- and 5-nm-thick Si cap samples, which reduces to 1.6X for an Si cap thickness of 3 nm. For Si cap and gate oxide thicknesses both equal to 1 nm, simulations predict a moderate degradation in p-MOSFET subthreshold swing, from 73 to 85 mV/dec, compared to that for the Si control.