Configurable NAND flash translation layer

Abstract

Flash memory is widely adopted in various consumer products, especially for embedded systems. With strong de-mands on product designs for overhead control and per-formance requirements, vendors must have an effective de-sign for the mapping of logical block addresses (LBA’s) and physical addresses of data over flash memory. This paper targets such an essential issue by proposing a configurable mapping method that could trade the main-memory over-head with the system performance under the best needs of vendors. A series of experiments is conducted to provide insights on different configurations of the proposed method. 1