Solution-Processed ZTO TFTs With Recessed Gate and Low Operating Voltage

Abstract

We demonstrate solution-processed zinc tin oxide thin-film transistors (TFTs) with a patterned-gate configuration. High- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$k$</tex></formula> and solution-processed zirconium oxide <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$(\hbox{ZrO}_{2})$</tex></formula> was employed to lower down the operating voltage. Devices with recessed and nonrecessed gate electrodes were compared to study the influence of gate surface relief on the performance of the solution-processed thin films. The TFTs with the recessed gate electrode operate at 5 V and have a threshold voltage of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\sim$</tex></formula> 1 V, subthreshold slope of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\sim$</tex></formula> 0.23 V/dec, saturation mobility of 2.5 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\hbox{cm}^{2}/\hbox{V} \cdot \hbox{s}$</tex></formula> , and on/off current ratio of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$&gt; \hbox{10}^{6}$</tex></formula> .