Publication | Closed Access
A high performance router architecture for interconnection networks
50
Citations
21
References
2002
Year
Unknown Venue
Hardware SecurityWormhole SwitchingEngineeringHigh Performance Computer NetworkEdge ComputingRouter ArchitectureComputer EngineeringComputer ArchitectureNetwork On ChipRouter DesignInterconnection NetworkInterconnection Network ArchitectureParallel ComputingInterconnection NetworksNew Router Architecture
We propose a new router architecture that supports wormhole switching and circuit switching concurrently. This architecture has been designed to take advantage of temporal communication locality. This can be done by establishing a circuit between nodes that are going to communicate frequently. Messages using those circuits face no contention. By combining circuit switching, pre-established physical circuits and wave pipelining across channels and switches, it is possible to increase network bandwidth considerably, also reducing latency for communications that use pre-established physical circuits. This router architecture also allows to reduce the overhead of the software messaging layer in multicomputers by offering a better hardware support. Preliminary performance evaluation results show a drastic reduction in latency and increment in throughput when messages are long enough, even if circuits are established for a single transmission and locality is not exploited.
| Year | Citations | |
|---|---|---|
Page 1
Page 1