Vertical high mobility wrap-gated inas nanowire transistor

Abstract

We demonstrate a wrap-gated field effect transistor based on a matrix of vertically standing InAs nanowires (Jensen, et. al., 2004). A lower limit of the mobility, derived from the transconductance, is on the order of 3000 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs. The narrow ~100 nm channels show excellent current saturation and a threshold of V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> = -0.15 V. The sub-threshold characteristics show a close to ideal slope of 62mV/decade over two orders of magnitude