Publication | Closed Access
Fast multivariate signature generation in hardware: The case of rainbow
35
Citations
6
References
2008
Year
Unknown Venue
Cryptographic PrimitiveEngineeringVlsi DesignHardware Verification LanguageEvolvable HardwareComputer ArchitectureHardware SystemsFormal VerificationHardware SecurityDigital SignatureEfficient ImplementationCmos TechnologyParallel ComputingElectrical EngineeringComputer EngineeringComputer ScienceCryptographyHigh-performance HardwareHardware EmulationVlsi ArchitectureFormal MethodsParallel Programming
This paper presents a time-area efficient hardware architecture for the multivariate signature scheme Rainbow. As a part of this architecture, a high-performance hardware optimized variant of the well-known Gaussian elimination over GF(2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">l</sup> ) and its efficient implementation are presented. The resulting signature generation core of Rainbow requires 63,593 gate equivalents and signs a message in just 804 clock cycles at 67 MHz using AMI 0.35μm CMOS technology. Thus, Rainbow provides significant performance improvements compared to RSA and ECDSA.
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