Hardware SecurityEngineeringVlsi DesignDelay ConstraintsVlsi ArchitectureHigh-performance ArchitectureComputer ArchitectureComputer EngineeringSystems EngineeringComputer SciencePerformance MetricsParallel ComputingFpga DesignPower-aware DesignChannel Width
Applications targeting FPGA integrated systems impose strict energy, channel width and delay constraints. We introduce the first many-objective clustering, MO-Pack, that targets these performance metrics concurrently. Detailed performance comparisons over state of the art clustering strategies targeting energy (P-T-VPack), delay (T-VPack), channel width (iRAC), and timing and routability (T-RPack) show that MO-Pack achieves its goals without increasing the logic area.
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