IBM Journal of Research and Development · 1990 · 153 citations · 9 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureHardware-software Co-designSystems ArchitectureData ParallelismInstruction Set ArchitectureInstruction-level ParallelismMultiprocessor SystemsBranch InstructionsExecution Unit OrganizationFloating-point ArithmeticRisc ArchitecturesSystem-level Parallelism
The IBM RISC System/6000* processor is a second-generation RISC processor which reduces the execution pipeline penalties caused by branch instructions and also provides high floating-point performance. It employs multiple functional units which operate concurrently to maximize the instruction execution rate. By employing these advanced machine-organization techniques, it can execute up to four instructions simultaneously. Approximately 11 MFLOPS are achieved on the LINPACK benchmarks.
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A study of branch prediction strategies
James E. Smith · 1998 · 794 citations · Full text
Reinhold Weicker · Communications of the ACM · 1984 · 618 citations · Full text
Branch Prediction Strategies and Branch Target Buffer Design
George Radin · 1982 · 234 citations