Publication | Closed Access
Event-EMU: an event driven timing simulator for MOS VLSI circuits
26
Citations
9
References
2003
Year
Unknown Venue
EngineeringVlsi DesignComputer ArchitectureSystem-level DesignIntegrated CircuitsHardware SystemsEvent DrivenHardware SecurityPriority Event QueueTiming AnalysisSystems EngineeringSingle Modeling StepModeling And SimulationParallel ComputingAsynchronous CircuitsElectrical EngineeringEvent-driven ApproachComputer EngineeringMicroelectronicsHardware EmulationVlsi ArchitectureBeyond CmosCircuit Simulation
An event-driven approach to MOS timing simulation is presented, which has proved to be more efficient and reliable than time-step-based methods. The MOS network is statically partitioned into groups of strongly coupled nodes called regions. Regions are scheduled for evaluation using a priority event queue. Events are predictions of the time at which nodes within a region will change by more than a voltage threshold. Region evaluation is performed using a single modeling step followed by linear relaxation. The simulator has been used to verify the timing and functionality of a number of large (>500 K transistors) VLSI chips. Performance is 2-5 times faster than time-step-based methods and 200-300 times faster than circuit simulation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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