2007 · 32 citations · 10 references
EngineeringComputer EngineeringElectrical EngineeringCircuit TheoryMicroelectronicsVlsi DesignDelay ModelingElectric CircuitsIntegrated Circuit DesignInterconnect DesignInterconnect TechnologyPropagation DelayGroup DelayInterconnect DelayInterconnect Delay ModelingPassive Network SynthesisPropagation Delay ModelingRlc NetworksSeries Rl CircuitsSignal Propagation Delay
In this paper, we propose a technique to compensate the propagation delay and losses in VLSI interconnects by using negative group delay (NGD) active circuits. This study uses the RLC models of interconnect lines currently considered in VLSI circuits. The circuit proposed here is based on a cell consisting of a Field Effect Transistor (FET) in parallel with a series RL passive network. We also describe the synthesis method to achieve simultaneousely a significant negative group delay and gain. Simulations allow us to first verify the performance of the NGD circuit and also show a restoration of the distorted signal shape as well as a reduction of propagation delay.
10
Performance optimization of VLSI interconnect layout
Jason Cong, Lei He, Cheng‐Kok Koh et al. · Integration · 1996 · 337 citations
Engineering, Computer Engineering, Electrical Engineering +12