Noise-aware repeater insertion and wire-sizing for on-chip interconnect using hierarchical moment-matching

Abstract

Article Noise-aware repeater insertion and wire-sizing for on-chip interconnect using hierarchical moment-matching Share on Authors: Chung-Ping Chen Strategic CAD Labs, Design Technology, Intel Corporation, Hillsboro, OR Strategic CAD Labs, Design Technology, Intel Corporation, Hillsboro, ORView Profile , Noel Menezes Strategic CAD Labs, Design Technology, Intel Corporation, Hillsboro, OR Strategic CAD Labs, Design Technology, Intel Corporation, Hillsboro, ORView Profile Authors Info & Claims DAC '99: Proceedings of the 36th annual ACM/IEEE Design Automation ConferenceJune 1999 Pages 502–506https://doi.org/10.1145/309847.309987Published:01 June 1999 28citation211DownloadsMetricsTotal Citations28Total Downloads211Last 12 Months1Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access