1991 · 82 citations · 2 references
EngineeringComputer EngineeringComputer ArchitectureDesign AutomationDesign OptimizationDesign SynthesisIntegrated Circuit DesignLayout DesignLayout EvaluationLayout OptimizationVery-large-scale Integration LayoutAutomated Layout SynthesisLayout BenchmarkingLayout Performance MetricsLayout Techniques
Article Benchmarks for layout synthesis—evolution and current status Share on Author: Krzysztof Koźmiński MCNC Center for Microelectronics, P.O. Box 12889, 3021 Cornwallis Road, Research Triangle Park, North Carolina MCNC Center for Microelectronics, P.O. Box 12889, 3021 Cornwallis Road, Research Triangle Park, North CarolinaView Profile Authors Info & Claims DAC '91: Proceedings of the 28th ACM/IEEE Design Automation ConferenceJune 1991 Pages 265–270https://doi.org/10.1145/127601.127678Online:01 June 1991Publication History 50citation349DownloadsMetricsTotal Citations50Total Downloads349Last 12 Months12Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access
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Combinational profiles of sequential benchmark circuits
F. Brglez, D. Bryan, Krzysztof Koźmiński · 2003 · 2.1K citations
Benchmarks for cell-based layout systems
Bryan Preas · 1987 · 62 citations