IEEE Transactions on Circuits and Systems for Video Technology · 1995 · 30 citations · 17 references
EngineeringComputer EngineeringComputer ScienceAlgorithmsComputer ArchitectureField-programmable Gate ArraysData CompressionDigital Image ProcessingDigital Signal ProcessingError DetectionHardware AccelerationCoordinate System RotationCordic AlgorithmsRedundant ComputationSystolic Array DesignSystolic Arrays
We propose a modified fast algorithm for discrete cosine transform (DCT) by transferring the results from the discrete Hartley transform (DHT) to one additional CORDIC (coordinate rotation digital computer) computing stage. A fast CORDIC-based systolic array is designed with four derived attractive features, including: (1) the single/double data folding feature; (2) the constructive feature; (3) the to-computing feature; and (4) the redundant computation. Due to its properties, the proposed design has an efficient hardware utilization and a high throughput rate. By using the redundant path, this design also has the capability of error detection.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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N. Ahmed, T. Natarajan, K.R. Rao · IEEE Transactions on Computers · 1974 · 5K citations
Natural Sciences, Computer Science, Electrical Engineering +16
A unified algorithm for elementary functions
John Stephen Walther · 1971 · 1K citations · Full text
R. N. Bracewell · Journal of the Optical Society of America · 1983 · 445 citations