International Journal of Computer Applications · 2011 · 35 citations · 6 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysParallel ComputingField-programmable Gate Array ArchitectureFpga ArchitectureHardware AccelerationParallel ArchitecturesReconfigurable System ArchitectureField-programmable Gate Arrays (Fpgas)Matrix MultiplicationParallel Computing ArchitecturesParallel ProcessingReconfigurable Computing ArchitecturesReconfiguration Of Field-programmable Gate ArraysSystolic Array DesignSystolic Arrays
The evolution of computer and Internet has brought demand for powerful and high speed data processing, but in such complex environment fewer methods can provide perfect solution. To handle above addressed issue, parallel computing is proposed as a solution to the contradiction. This paper provides solution for the addressed issues of demand for high speed data processing. This paper demonstrates an effective design for the Matrix Multiplication using Systolic Architecture on Reconfigurable Systems (RS) like Field Programmable Gate Arrays (FPGAs).
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