A Flexible, Ultra-Low-Energy 35 pJ/Pulse Digital Back-End for a QAC IR-UWB Receiver

Abstract

A low-energy, flexible digital back-end for the quadrature analog correlating (QAC) IR-UWB receiver, implemented in 0.13 m CMOS technology, is presented. The built-in flexibility allows the receiver to operate over a wide range of frequency bands, pulse rates, code lengths, acquisition modes, etc. This ability to dynamically trade power consumption, system performance and system reliability is crucial for application in sensor networks where energy is scarce. To avoid the large power penalty, that often accompanies the introduction of flexibility, the chip's architecture is based on nested FLEXmodules. These are small configurable modules with a local controller, that can be slowed down and clock gated individually. Communicating at 40 Mpulses/s, the resulting digital back-end consumes as little as 3.5 mW in acquisition mode and 1.5 mW during data reception. This is equivalent to an energy consumption of 35 pJ per received pulse.