Modeling substrate effects in the design of high-speed Si-bipolar ICs

Abstract

In the design of high-speed IC's, the influence of the substrate on circuit performance must be considered carefully. Therefore, in this paper the contribution of the p/sup -/ substrate and channel stopper to the equivalent circuits of Si-bipolar transistors and bond pads are theoretically and experimentally investigated up to very high frequencies. Improved equivalent substrate circuits, well suited for standard circuit simulators (e,g., SPICE), are derived and checked by numerical simulation using a new simulator (called SUSI). The validity of both the numerical simulation results and the equivalent circuits are verified by on-wafer measurements up to 20 GHz. Finally, the simulator was successfully applied to investigate noise coupling via the substrate.