2006 · 48 citations · 3 references
Hardware SecurityHardware ArchitectureEngineeringHardware EmulationReconfiguration Control SystemsReconfigurable Control SystemComputer EngineeringComputer ArchitectureSystems EngineeringHardware Description LanguageComputer ScienceReconfigurable ArchitectureEmbedded SystemsParallel ComputingPartial Bitstream ManipulationFpga DesignReconfigurabilityVirtex Ii
This paper presents a tool for Virtex II (Pro) FPGA partial bitstream manipulation suited for reconfigurable control systems with limited computing resources. The basics for partial bitstream manipulation in Virtex II (Pro) FPGAs are shown, including bit allocation equations that could be used to create such tools. After that, a tool for partial bitstream manipulation, called pBITPOS, and a use case in a reconfigurable control system are described. Differently from other non Virtex II (Pro) solutions, this tool can be integrated in a reconfiguration control system, running on an embedded device, and it can handle BRAM/MULs related data.
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J.-Y. Mignolet, V. Nollet, Paul Coene et al. · 2003 Design, Automation and Test in Europe Conference and Exhibition · 2003 · 67 citations