A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers

Abstract

This paper presents a full software defined receiver with 3 dB noise figure that tolerates 0 dBm blockers with acceptable blocker noise figure at maximum gain. It achieves +10 dBm out-of-band (OB) IIP3 and >;+70dBm IIP2. Such a receiver is to operate using no other than harmonic-rejection filtering.