idUS (Universidad de Sevilla) · 2005 · 71 citations · 12 references
EngineeringComputer EngineeringComputer ScienceComputer VisionNeural EngineeringSystem-on-chip DesignDeep LearningNeural CircuitsNeural Signal AcquisitionNeural Signal ProcessingSpiking Neural NetworksVisual SystemAddress Space MappingConvolutionConvolutional Spiking Neural NetworksNeuromorphic DevicesNeuromorphic HardwareRetinal Information ProcessingSpike DetectionVisual Signal Processing
A 5-layer neuromorphic vision processor whose components \ncommunicate spike events asychronously using the address-eventrepresentation \n(AER) is demonstrated. The system includes a retina \nchip, two convolution chips, a 2D winner-take-all chip, a delay line \nchip, a learning classifier chip, and a set of PCBs for computer \ninterfacing and address space remappings. The components use a \nmixture of analog and digital computation and will learn to classify \ntrajectories of a moving object. A complete experimental setup and \nmeasurements results are shown.
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On algorithmic rate-coded AER generation
Alejandro Linares-Barranco, G. Jiménez, B. Linares-Barranco et al. · IEEE Transactions on Neural Networks · 2006 · 70 citations · Full text
A multi-sender asynchronous extension to the AER protocol
J. Lazzaro, John Wawrzynek · 2002 · 62 citations