2003 · 37 citations · 5 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureEmbedded SystemsLow-power DesignCmos Circuit DesignEmbedded Memory BlocksHardware AccelerationLow-power Digital Circuit DesignMemory Hierarchy DesignMemory Subsystem DesignAcceleratorsAudio HardwareDigital Filtering ArchitecturesDigital Signal Processing AccelerationDigital Signal Processing Block ArchitectureFilteringMemory Interface IntegrationRisc Architectures
A single-chip MPEG-4 audiovisual LSI in a 0.13 /spl mu/m 5M CMOS technology with 16 Mb embedded DRAM is presented. Four 16 b RISC processors and dedicated hardware accelerators including a 5 GOPS post filtering engine are integrated on the IC. The chip consumes 160 mW at 125 MHz and uses 80 nA in the standby mode. This LSI handles MPEG-4 CIF video encoding at 15 frames/s and audio encoding simultaneously.
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A 60 MHz 240 mW MPEG-4 video-phone LSI with 16 Mb embedded DRAM
Takafumi Nishikawa, Masafumi Takahashi, M. Hamada et al. · 2002 · 45 citations
Engineering, Computer Engineering, Electrical Engineering +17
Chi-Weon Yoon, Ramchan Woo, Jeengheon Kook et al. · IEEE Journal of Solid-State Circuits · 2001 · 41 citations
A 90 mW MPEG4 video codec LSI with the capability for core profile
T. Hashimoto, S. Kuromaru, M. Matsuo et al. · 2002 · 27 citations
Engineering, Computer Engineering, Electrical Engineering +15
A 27 MHz 11.1 mW MPEG-4 video decoder LSI for mobile application
Masaharu Ohashi, T. Hashimoto, S. Kuromaru et al. · 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2003 · 24 citations
Engineering, Computer Engineering, Electrical Engineering +14