Publication | Closed Access
A magnetic power and communication interface for a CMOS integrated circuit
18
Citations
4
References
1989
Year
EngineeringCommunication InterfaceIntegrated CircuitsInterconnect (Integrated Circuits)Electromagnetic CompatibilityCircuit SystemMixed-signal Integrated CircuitMagnetic PowerElectronic CircuitElectrical EngineeringHigh-frequency DeviceComputer EngineeringOptimal DesignBulk CmosMicroelectronicsLow-power ElectronicsPower IcMagneto-inductive CommunicationsOn-chip Planar Coils
Bulk CMOS integrated circuits which receive power and perform all I/O functions exclusively by means of inductive coupling are discussed. Both layers of metal in a conventional two-level-metal 3 mu m p-well technology were used to construct on-chip planar coils for sensing and perturbing externally generated magnetic fields in the 100 kHz to 10 MHz regime. The optimal design uses few, rather than many, coil turns operated at high frequency. The power delivered to one test chip was 0.9 mW at 3 V, while a second test chip demonstrated inductive low-power bidirectional communication.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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