Publication | Closed Access
A chip-level electrothermal simulator for temperature profile estimation of CMOS VLSI chips
17
Citations
4
References
2002
Year
Unknown Venue
EngineeringVlsi DesignComputer ArchitectureCmos Vlsi ChipsTemperature-related Reliability ProblemsChip-level Electrothermal SimulatorPhysical Design (Electronics)Advanced Packaging (Semiconductors)Modeling And SimulationThermodynamicsElectronic PackagingElectrical EngineeringComputer EngineeringHeat TransferMicroelectronicsVlsi ChipsVlsi ArchitectureThermal EngineeringTemperature Profile EstimationCircuit Simulation
In this paper, we present a chip-level electrothermal simulator, ILLIADS-T. It aims at finding the steady-state CMOS VLSI chip temperature profile and the corresponding circuit performance. With this tool, temperature-related reliability problems of VLSI chips can be accurately predicted to guide the module placement, packaging, as well as the timing verification.
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