Publication | Closed Access
Steiner tree optimization for buffers, blockages, and bays
41
Citations
24
References
2001
Year
Mathematical ProgrammingEngineeringVlsi DesignComputer ArchitectureStructural OptimizationDeep Submicrometer DesignHigh-performance ArchitectureBuffer InsertionTiming ClosureParallel ComputingCombinatorial OptimizationNetwork OptimizationComputer EngineeringNetwork On ChipSteiner Tree OptimizationBuffer ManagementComputer ScienceTopology OptimizationVlsi Architecture
Timing optimization is a critical component of deep submicrometer design and buffer insertion is an essential technique for achieving timing closure. This work studies buffer insertion under the constraint that the buffers either: (1) avoid blockages or (2) are contained within preassigned buffer bay regions. We propose a general Steiner-tree formulation to drive this application and present a maze-routing-based heuristic that either avoids blockages or finds buffer bays. We show that the combination of our Steiner-tree optimization with leading-edge buffer-insertion techniques leads to effective solutions on industry designs.
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