A High-Speed and High-Responsivity Photodiode in Standard CMOS Technology

Abstract

This work investigates a new silicon (Si) photodiode (PD) by standard complementary metal-oxide-semiconductor (CMOS) process. The basic structure of the proposed Si PD is formed by multiple p-n diodes with shallow trench isolation oxide in between p- and n-region from Taiwan Semiconductor Manufacturing Company 0.18-mum CMOS technology. The proposed PD demonstrates a responsivity of 0.37 A/W at zero bias (lambda=823nm). At reverse bias (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</sub> ) of 14.3 V, the fabricated PD exhibits a high responsivity of 0.74 A/W, a -3-dB electrical bandwidth of 1.6 GHz, and an eye diagram at 3.5 Gb/s