Analysis of a half-rate bang-bang phase-locked-loop

Abstract

This brief presents the timing analysis of a half-rate phaselocked loop (PLL) with a bang-bang phase detector. The lock-in behavior of the PLL is discussed and parameters such as jitter, lock-in frequency range, and lock-in time are calculated. Behavioral simulation is used to validate the analytical results with particular emphasis on the PLL lock-in behavior.