1989 · 56 citations · 3 references
ComputingComputer EngineeringComputer ScienceCompilersComputer ArchitectureSchedulingControl-flow AnalysisData-flow AnalysisDesign HierarchyDesign SynthesisHigh-level SynthesisInstruction SchedulingControl Flow GraphsDataflow GraphsExecution UnitsHigh-level Synthesis For Digital Signal ProcessingHigh-level Synthesis For Embedded Systems
The paper describes a new algorithm for the scheduling and resource allocation problem in high-level synthesis. The algorithm can not only efficiently treat flattened signal flow graphs, but also handles graphs with embedded control constructs such as conditional branches and loops. Based on simple and clear, but powerful principles, the algorithm simultaneously minimizes the number of execution units, the number of registers and the amount of interconnections. The algorithm has been implemented and we present the first results, which are very promising.
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Tutorial on high-level synthesis
Michael C. McFarland, Alice C. Parker, Raúl Camposano · 1988 · 292 citations
A data-driven VLSI array for arbitrary algorithms
Israel Koren, Bilha Mendelson, Irit Peled et al. · Computer · 1988 · 57 citations