2003 · 37 citations · 6 references
Chip VlsiElectrical EngineeringEngineeringVlsi DesignVlsi ArchitectureMixed-signal Integrated CircuitComputer EngineeringComputer ArchitectureHigh Throughput RateDigital Circuit DesignBlock SizeMicroelectronicsBeyond CmosSignal ProcessingInverse DctAnalog-to-digital Converter
A single-chip two-dimensional discrete cosine transform processor is presented. This chip meets the challenge of high throughput rate (13.5 MHz) and versatility (block size from 4*4 to 16*16, and direct and inverse DCT) with a die area as small as 40 mm/sup 2/. An efficient optimized architecture providing high computation power is described. The chip is found to exhibit excellent precision performances. A full-custom approach was chosen because of the required speed and economic reasons (implementation of a low-cost real-time video coder/decoder). The chip uses a 1.25- mu m CMOS technology and contains 114000 transistors on 5.4*7.5 mm/sup 2/.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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N. Ahmed, T. Natarajan, K.R. Rao · IEEE Transactions on Computers · 1974 · 4.9K citations
A single chip video rate 16&#215;16 discrete cosine transform
F. Jutand, N. Demassieux, G. Concordel et al. · 2005 · 21 citations