A 531 nW/MHz, 128×32 current-mode programmable analog vector-matrix multiplier with over two decades of linearity

R. Chawla, Abhishek Bandyopadhyay, P. Hasler

2004 · 57 citations · 9 references

Concepts

Abstract

We present a 128/spl times/32 four-quadrant programmable current-mode analog vector-matrix multiplier (VMM). The proposed multiplier cell operates on a 3.3 V supply, consumes 531 nW/MHz and is linear over two decades of current range. Programmability and non-volatile weight storage is obtained by using floating-gate transistors. Experimental results for a full image discrete cosine transform (DCT) using the proposed architecture is presented. The IC prototype was fabricated in a 0.5 /spl mu/m CMOS process and occupies 0.83 mm/sup 2/ of area.

References

9