Co-processorsEngineeringHardware AccelerationMixed-signal Integrated CircuitAnalog DesignHardware AlgorithmComputer EngineeringComputer ArchitectureSystematic Fourier ProcessorComputer ScienceDigital Circuit DesignParallel ComputingBand WeightingFast Fourier TransformAnalog-to-digital Converter
We present a programmable continuous-time floating-gate Fourier processor that decomposes the incoming signal into frequency bands by analog bandpass filters, multiplies each channel by a nonvolatile weight, and then recombines the frequency channels. A digital signal processor would take a similar approach of computing a fast Fourier transform (FFT), multiplying the frequency components by a weight and then computing an inverse PFT. We decompose the frequency bands of the incoming signal using the transistor-only version of the autozeroing floating-gate amplifier (AFGA), also termed the capacitively coupled current conveyer (C/sup 4/). Each band decomposition is then fed through a floating-gate multiplier to perform the band weighting. Finally, the multiplier outputs are summed using Kirchoff current law to give a band-weighted output of the original signal. We examine many options to reduce second-order harmonic problems inherent in the single-sided C/sup 4/. We present a method for programming arrays of floating-gate devices that are used in the weighting of the bands. All of these pieces fit together to form an elegant and systematic Fourier processor.
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Single Transistor Learning Synapses
P. Hasler, C. Diorio, B.A. Minch et al. · CaltechAUTHORS (California Institute of Technology) · 1994 · 102 citations · Full text