An integrated approach for analog circuit testing with a minimum number of detected parameters

TLDR

Testability evaluation aids in generating test vectors and selecting test nodes for various fault types. The paper presents a technique for multifrequency test vector generation using testability analysis and output response detection via a translation built‑in self‑test (T‑BIST). The method studies analog circuit testability in the frequency domain by introducing analog fault observability, verifies test parameters against acceptance ranges, and converts detected parameters to DC voltages for T‑BIST. The approach reduces the number of measured output parameters to one or two while maintaining fault coverage, and achieves complete test solutions for various practical filters.

Abstract

A technique for multifrequency test vector generation using testability analysis and output response detection by adding a translation built-in self test (T-BIST) is presented. We study the testability of analog circuits in the frequency domain by introducing the analog fault observability concept. This testability evaluation will be helpful in generating the test vectors and for selecting test nodes for the various types of faults. In the proposed approach test vector generation and test point selection allow a significant reduction in the number of measured output parameters necessary for testing (to one or two parameters) without a loss in fault coverage. The T-BIST approach consists of verifying whether or not the tested parameters for the given test vector are within the acceptance range. This technique is based on the conversion of each detected parameter to a DC voltage. Results are presented for different practical filters for which a complete test solution was achieved.